As an example of the case where a potential control circuit is provided on a source line of a static memory cell and the source potential is controlled to an intermediate potential during standby of the memory cell by the potential control circuit, thereby reducing the leakage current, Japanese Patent Application Laid-Open Publication No. 2004-206745 (Patent Document 1) has been proposed. Further, as an example of the case where additional MOSFETs are provided on either one of a power supply line and a ground line of a memory cell and a bias voltage which reflects either one or both of variations in the threshold voltage of the MOSFETs constituting a cross feedback circuit of the memory cell during standby of the memory cell is formed and controlled, Japanese Patent Application Laid-Open Publication No. 2006-073065 (Patent Document 2) has been proposed.